Sr. ASIC DFT Engineer (Silicon)

Sr. ASIC DFT Engineer (Silicon) at SpaceX in Sunnyvale, CA, United States. **What you'll do** - Implement and optimize DFT architectures, including scan insertion and memory BIST, leveraging Siemens Tessent tools. - Set up and run Automatic Test Pattern Generation (ATPG) tools and methodologies. - Create and validate DFT patterns for post-silicon bringup and assist with ATE debug. - Develop test scripts and automate processes using Perl, Python, Tcl, or C++. **What they're looking for** - Bachelor’s degree in electrical engineering, computer engineering, or physics. - 5+ years of experience in semiconductor Design For Test (DFT) engineering, post-silicon validation, or production testing. - Experience with non-timing and SDF annotated gate-level simulations. **Details** - Location: Sunnyvale, CA, United States - Type: Full-time