Principal ASIC Design Engineer (Silicon Engineering)

**Principal ASIC Design Engineer (Silicon Engineering) at SpaceX in Palo Alto, CA** **What you'll do** - Evaluate architectural trade-offs based on features and requirements - Define micro-architecture and implement RTL in Verilog/System Verilog - Work with verification team to ensure design coverage - Provide timing constraints and support physical implementation **What they're looking for** - Bachelor's degree in electrical engineering, computer engineering, or computer science - 10+ years of experience in RTL implementation - Ability to solve complex problems including clock domain crossings - Experience with ASIC/SoC system integration **Details** - Location: Palo Alto, CA - Type: Not specified - Salary: Not specified