Design Verification Engineer (Silicon Engineering)

**Design Verification Engineer (Silicon Engineering) at SpaceX in Palo Alto, CA** **What you'll do** - Responsible for digital ASIC verification at block and system level - Write and review test plans, develop test harnesses and test sequences - Develop SystemVerilog testbench infrastructure for testing designs - Contribute towards pre-silicon verification, chip bring-up and post-silicon validation **What they're looking for** - Bachelor's degree in electrical engineering, computer science or computer engineering - 1+ years of experience with design verification and test bench development - Experience with verification methodologies such as UVM - Strong object-oriented programming knowledge **Details** - Location: Palo Alto, CA - Type: Not specified - Salary: Not specified