ASIC/SOC DFT Engineer (Silicon Engineering)
SpaceX
Location: Palo Alto, CA, United States
**ASIC/SOC DFT Engineer at SpaceX in Palo Alto, CA** **What you'll do** - Evaluate design readiness for scan insertion through RTL and physical design DRC tools - Integrate and verify DFT fabrics and IP within Subsystems - Run ATPG analysis to ensure quality scan chain construction - Create ATPG content for post-silicon testing **What they're looking for** - Bachelor's degree in electrical engineering, computer engineering or computer science - 1+ years of professional experience working with ASICs - Experience in scan insertion or DFT setup - Understanding of ASIC design flow, methodologies, physical design, and verification **Details** - Location: Palo Alto, CA - Type: Not specified - Salary: null
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